Synopsys VCS - HDL Simulator of System Verilog, Verilog, and VHDL for ASIC design and verification.
Fritzing - Fritzing is an open-source initiative to support designers, artists, researchers and hobbyists to...
Riviera-PRO - System Verilog, Verilog. VHDL, SystemC, HDL simulator targeting ASIC and large FPGA designs.
Proteus PCB design - Proteus PCB design combines the schematic capture and ARES PCB layout programs to provide a...
Cadence Incisive - System Verilog, Verilog, VHDL, SystemC HDL Simulator for ASIC Design and Verification
LTspice - LTspice® is a high performance SPICE simulation software, schematic capture and waveform viewer with enhancements and models for easing the simulation of analog circuits.